CALL FOR PAPERS -- AMAS-BT 2009

2nd Workshop on Architectural and Microarchitectural Support for Binary Translation

Held in conjunction with the 36th Int'l Symposium on Computer Architecture (ISCA-36)

Austin, Texas -- June 20, 2009

http://amas-bt.cs.virginia.edu/

Workshop Overview

Long employed by industry, large scale use of binary translation and on-the-fly code generation is becoming pervasive both as an enabler for virtualization, processor migration and also as processor implementation technology. The emergence and expected growth of just-in-time compilation, virtualization and Web 2.0 scripting languages brings to the forefront a need for efficient execution of this class of applications. The availability of multiple execution threads brings new challenges and opportunities, as existing binaries need to be transformed to benefit from multiple processors, and extra processing resources enable continuous optimizations and translation.

The main goal of this half-day workshop is to bring together researchers and practitioners with the aim of stimulating the exchange of ideas and experiences on the potential and limits of Architectural and MicroArchitectural Support for Binary Translation (hence the acronym AMAS-BT). The key focus is on challenges and opportunities for such assistance and opening new avenues of research. A secondary goal is to enable dissemination of hitherto unpublished techniques from commercial projects.

The workshop scope includes support for decoding/translation, support for execution optimization and runtime support. It will set a high scientific standard for such experiments, and requires insightful analysis to justify all conclusions. The workshop will favor submissions that provide meaningful insights, and identify underlying root causes for the failure or success of the investigated technique. Acceptable work must thoroughly investigate and communicate why the proposed technique performs as the results indicate.

Submission Topics

Hardware assistance for translation and code discovery:

Hardware assistance for optimization:

Hardware assistance for runtime management:

Binary Translation: Architectural effects and experience:

How to Submit

Please email Mauricio Breternitz:

Submissions will be acknowledged via return email within 48 hours.

Important Dates

Workshop Organizers

Program Committee


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