FINAL PROGRAM

1^st Workshop on Architectural and Microarchitectural Support for Binary Translation

Held in conjunction with the 35th Int'l Symposium on Computer Architecture (ISCA-35)

Beijing, China -- June 21, 2008

http://amas-bt.cs.virginia.edu/

The AMAS-BT organizing and program committee would like to invite you to attend the Workshop on Architectural and MicroArchitectural Support for Binary Translation to be held in Beijing, China, Jun 21, 2008, in conjunction with the 35th International Symposia on Computer Architecture (ISCA).

This workshop will feature a keynote by David R. Ditzel, VP of Hybrid Parallel Computing, Intel Corp on "Experiences with Dynamic Binary Translation" and six technical papers. Two of the six technical papers are short papers. Please see the advance program below.

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8:30 AM - Opening and Keynote

• Experiences with Dynamic Binary Translation
  David R. Ditzel
  VP Hybrid Parallel Computing, Intel Corporation

9:30 AM - Session 1 - Short Papers

• Impact of Dynamic Binary Translators on Security
  Yu-Yuan Chen, Youfeng Wu, Shiliang Hu, Ruby Lee
• A Hardware/Software Co-Designed Virtual Machine to Support Multiple ISAs
  TingTao Li, Alei Liang, and Haibing Guan

10:00 AM - Break

10:30 AM - Session 2

• Characterization of Dynamic Binary Translation Overhead
  Edson Borin and Youfeng Wu
• Cold Code Analysis
  Wesley Attrot and Guido Araujo

11:20 AM - Session 3

• A New Replacement Algorithm on Content Associative Memory for Binary Translation System
  Jiang Li and Chenggang Wu
• Virtualization without Direct Execution or Jitting: Designing a Portable Virtual Machine Infrastructure
  Darek Mihocka and Stanislav Shwartsman

12:10 PM - Wrap Up

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